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In the field of silicon photonics, highly compact and miniature high‐density circuits are achieved by precisely shaping millimeter‐long waveguides into spiral configurations. Organic photonics, on the other hand, takes advantage of mechanically flexible crystal spiral waveguides (SWs) within organic photonic circuits. These SWs offer versatility, enabling precise control over light paths and mechanical programmability. This study introduces an innovative pick‐and‐place technique for constructing various organic spiral waveguides (OSWs) with different geometries, such as Cornu, Archimedean, elliptical, rectangular, four‐sided polygons, and three‐sided polygons. Additionally, this method allows for the creation of optically reprogrammable photonic circuits. Custom‐synthesized flexible crystals are used, including blue‐emitting (Z)−3‐(4‐(9H‐carbazol‐9‐yl)phenyl)−2‐(3,5‐bis(trifluoromethyl)phenyl)acrylonitrile (Cz‐2CF3), green‐emitting (E)−1‐(((5‐bromopyridin‐2‐yl)imino)methyl)naphthalene‐2‐ol (BPyIN), cyan‐emitting 9,10‐dibromo anthracene (DBA), and red‐emitting 4,7‐bis(4‐octylthiophen‐2‐yl)benzo[c][1,2,5]thiadiazole (BTD). Systematically integrating a Cz‐2CF3 OSW (with two ports for optical signal routing in clockwise/counterclockwise directions) with DBA and BTD waveguides produces multi‐color hybrid photonic circuits with customizable optical functions, tailored to specific design needs. The number of output ports can be dynamically adjusted through mechanical programming by coupling crystals tip‐to‐tip when replacing the DBA waveguide with a BPyIN waveguide using the pick‐and‐place technology. This mechanically programmable hybrid spiral photonic circuit seamlessly operates across the entire visible spectral bandwidth, making it valuable for various applications, including high‐fidelity sensing, spectrometer components, and intelligent circuitry. [ABSTRACT FROM AUTHOR]

Mass-deployable implementations for quantum communication require compact, reliable, and low-cost hardware solutions for photon generation, control and analysis. We present a fiber-pigtailed hybrid photonic circuit comprising nonlinear waveguides for photon-pair generation and a polymer interposer reaching 68 dB of pump suppression and photon separation based on a polarizing beam splitter with > 25 dB polarization extinction ratio. The optical stability of the hybrid assembly enhances the quality of the entanglement, and the efficient background suppression and photon routing further reduce accidental coincidences. We thus achieve a 96 - 8 + 3 % concurrence and a 96 - 5 + 2 % fidelity to a Bell state. The generated telecom-wavelength, time-bin entangled photon pairs are ideally suited for distributing Bell pairs over fiber networks with low dispersion. [ABSTRACT FROM AUTHOR]

Spins are prototypical systems with the potential to probe magnetic fields down to the atomic scale limit. Exploiting their quantum nature through appropriate sensing protocols allows to enlarge their applicability to fields not always accessible by classical sensors. Here we first show that quantum sensing protocols for AC magnetic fields can be implemented with molecular spin ensembles embedded into hybrid quantum circuits. We then show that, using only echo detection at microwave frequency and no optical readout, Dynamical Decoupling protocols synchronized with the AC magnetic fields can enhance sensitivity up to S ≈ 10−10 − 10−9 T Hz−1/2 with a low (4-5) number of applied pulses. These results paves the way for the development of strategies to exploit molecular spins as quantum sensors. [ABSTRACT FROM AUTHOR]

This Letter introduces an on-chip topological phononic crystal (PnC) acoustic waveguide employing lithium niobate thin films. Utilizing a C 3 v symmetry-breaking mechanism, the topological PnC acoustic waveguide is achieved, operating at frequencies exceeding 430 MHz. A SH0 mode acoustic transceiver is designed, enabling highly efficient on-chip acoustic wave transmission and reception. The fabricated topological PnC waveguide demonstrates a propagation loss of 11.3 dB/mm at the edge mode. An acoustic beam splitter utilizing topological edge mode has been demonstrated, showing the configurability of the topological PnC acoustic waveguide. These results offer significant promise for advancing the development of hybrid phononic circuits tailored for high-frequency acoustic information processing, sensing, and manipulation. [ABSTRACT FROM AUTHOR]

For processing streaming events from a Dynamic Vision Sensor camera, two types of neural networks can be considered. One are spiking neural networks, where simple spike-based computation is suitable for low-power consumption, but the discontinuity in spikes can make the training complicated in terms of hardware. The other one are digital Complementary Metal Oxide Semiconductor (CMOS)-based neural networks that can be trained directly using the normal backpropagation algorithm. However, the hardware and energy overhead can be significantly large, because all streaming events must be accumulated and converted into histogram data, which requires a large amount of memory such as SRAM. In this paper, to combine the spike-based operation with the normal backpropagation algorithm, memristor–CMOS hybrid circuits are proposed for implementing event-driven neural networks in hardware. The proposed hybrid circuits are composed of input neurons, synaptic crossbars, hidden/output neurons, and a neural network's controller. Firstly, the input neurons perform preprocessing for the DVS camera's events. The events are converted to histogram data using very simple memristor-based latches in the input neurons. After preprocessing the events, the converted histogram data are delivered to an ANN implemented using synaptic memristor crossbars. The memristor crossbars can perform low-power Multiply–Accumulate (MAC) calculations according to the memristor's current–voltage relationship. The hidden and output neurons can convert the crossbar's column currents to the output voltages according to the Rectified Linear Unit (ReLU) activation function. The neural network's controller adjusts the MAC calculation frequency according to the workload of the event computation. Moreover, the controller can disable the MAC calculation clock automatically to minimize unnecessary power consumption. The proposed hybrid circuits have been verified by circuit simulation for several event-based datasets such as POKER-DVS and MNIST-DVS. The circuit simulation results indicate that the neural network's performance proposed in this paper is degraded by as low as 0.5% while saving as much as 79% in power consumption for POKER-DVS. The recognition rate of the proposed scheme is lower by 0.75% compared to the conventional one, for the MNIST-DVS dataset. In spite of this little loss, the power consumption can be reduced by as much as 75% for the proposed scheme. [ABSTRACT FROM AUTHOR]

In the field of fault isolation and clearance in flexible DC power grids, hybrid DC circuit breakers (HDCCB) have been widely used because of their advantages. However, their development is limited by high construction costs and inapplicability in some fault cases. In addition, adaptive reclosing capability is required for overhead DC lines with high fault probability. Therefore, this paper proposes a new type of multi-port hybrid DC circuit breaker (MP-HDCCB) with current limiting, breaking, and self-charging capabilities. The capacitor polarity reversal circuit is designed to reduce the influence of capacitor pre-charging on the normal operation of the system and to solve the problem of two consecutive line faults occurring in a short period of time. In addition, the circuit breaker can limit the current and break in the face of a single line fault, multiple line faults at the same time, and bus faults. It also has the ability of adaptive reclosing and normal operation of the line after a bus fault. Based on the proposed topology, a 500 kV four-terminal DC system is designed, and a model is established in PSCAD/EMTDC to verify the capabilities of the circuit breaker. Results show that the circuit breaker has adaptive reclosing capability and can realize fault current limiting and breaking under different fault conditions. [ABSTRACT FROM AUTHOR]

In recent years, with the rapid development of high-voltage flexible direct current (DC) transmission systems, more and more multi-port high-voltage DC systems have been successfully put into operation. Therefore, the number of connecting ports on the DC bus is gradually increasing, which necessitates higher requirements for clearing fault current. To better protect the DC power grid, this paper integrates a DC fault current limiter with a multi-port DC circuit breaker. This article proposes a modular cascaded multi-port hybrid DC circuit breaker topology. It also elaborates on the topology structure, working principle, and control program under three different fault conditions. It completes the theoretical derivation and analysis of the circuit breaker fault isolation process, as well as the parameter design of the core components. Finally, a model is established in PSCAD/EMTDC for simulation verification. The application performance of the circuit breaker in four-terminal DC systems is studied and analyzed, and the current-limiting effect of the multi-port DC circuit breaker proposed in this article is demonstrated. In addition, the disconnection performance and energy consumption of the arrester have been improved to a certain extent, which has good feasibility and economy. [ABSTRACT FROM AUTHOR]

Hybrid magnetic tunnel junction/complementary metal oxide semiconductor (MTJ/CMOS) circuits based on in-memory-computation (IMC) architecture is considered as the next-generation candidate for the digital integrated circuits. However, the energy consumption during the MTJ write process is a matter of concern in these hybrid circuits. In this regard, we have developed a novel write circuit for the contemporary three-terminal perpendicular-MTJs that works on the voltage-gated spin orbit torque (VG+SOT) switching mechanism to store the information in hybrid circuits for IMC architecture. Investigation of the novel write circuit reveals a remarkable reduction in the total energy consumption (and energy delay product) of 92.59% (95.81) and 92.28% (42.03%) than the conventional spin transfer torque (STT) and spin-Hall effect assisted STT (SHE+STT) write circuits, respectively. Further, we have developed all the hybrid logic gates followed by nonvolatile full adders (NV-FAs) using VG+SOT, STT, and SHE+STT MTJs. Simulation results show that with the VG+SOT NOR-OR, NAND-AND, XNOR-XOR, and NV-FA circuits, the reduction in the total power dissipation is 5.35% (4.27%), 5.62% (3.2%), 3.51% (2.02%), and 4.46% (2.93%) compared to STT (SHE+STT) MTJs respectively. [ABSTRACT FROM AUTHOR]

Real-time heterogeneous parallel embedded digital signal processor (DSP) systems process multiple data streams in parallel in a stringent time interval. This type of system on chip (SoC) requires the network on chip (NoC) to establish multiple symbiotic parallel data transmission paths with ultra-low transmission latency in real time. Our early NoC research PCCNOC meets this need. The PCCNOC uses packet routing to establish and lock a transmission circuit, so that PCCNOC is perfectly suitable for ultra-low latency and high-bandwidth transmission of long data packets. However, a parallel multi-data stream DSP system also needs to transmit roughly the same number of short data packets for job configuration and job execution status reports. While transferring short data packets, the link establishment routing delay of short data packets becomes relatively obvious. Our further research, thus, introduced PaCHNOC, a hybrid NoC in which long data packets are transmitted through a circuit established and locked by routing, and short data packets are attached to the routing packet and the transmission is completed during the routing process, thus avoiding the PCCNOC setup delay. Simulation shows that PaCHNOC performs well in supporting real-time heterogeneous parallel embedded DSP systems and achieves overall latency reduction 65% compared with related works. Finally, we used PaCHNOC in the baseband subsystem of a real 5G base station, which proved that our research is the best NoC for baseband subsystem of 5G base stations, which reduce 31% comprehensive latency in comparison to related works. [ABSTRACT FROM AUTHOR]

This paper proposes a fast transient load response capacitor-less low-dropout regulator (CL-LDO) for digital analog hybrid circuits in the 180 nm process, capable of converting input voltages from 1.2 V to 1.8 V into an output voltage of 1 V. The design incorporates a rail-to-rail input and push–pull output (RIPO) amplifier to enhance the gain while satisfying the requirement for low power consumption. A super source follower buffer (SSFB) with internal stability is introduced to ensure loop stability. The proposed structure ensures the steady-state performance of the LDO without an on-chip capacitor. The auxiliary circuit, or transient enhancement circuit, does not compromise the steady-state stability and effectively enhances the transient performance during sudden load current steps. The proposed LDO consumes a quiescent current of 47 µA and achieves 25 µV/mA load regulation with a load current ranging from 0 to 20 mA. The simulation results demonstrate that a settling time of 0.2 µs is achieved for load steps ranging from 0 mA to 20 mA, while a settling time of 0.5 µs is attained for load steps ranging from 20 mA to 0 mA, with an edge time of 0.1 µs. [ABSTRACT FROM AUTHOR]

Hydrogel-gated synaptic transistors offer unique advantages, including biocompatibility, tunable electrical properties, being biodegradable, and having an ability to mimic biological synaptic plasticity. For processing massive data with ultralow power consumption due to high parallelism and human brain-like processing abilities, synaptic transistors have been widely considered for replacing von Neumann architecture-based traditional computers due to the parting of memory and control units. The crucial components mimic the complex biological signal, synaptic, and sensing systems. Hydrogel, as a gate dielectric, is the key factor for ionotropic devices owing to the excellent stability, ultra-high linearity, and extremely low operating voltage of the biodegradable and biocompatible polymers. Moreover, hydrogel exhibits ionotronic functions through a hybrid circuit of mobile ions and mobile electrons that can easily interface between machines and humans. To determine the high-efficiency neuromorphic chips, the development of synaptic devices based on organic field effect transistors (OFETs) with ultra-low power dissipation and very large-scale integration, including bio-friendly devices, is needed. This review highlights the latest advancements in neuromorphic computing by exploring synaptic transistor developments. Here, we focus on hydrogel-based ionic-gated three-terminal (3T) synaptic devices, their essential components, and their working principle, and summarize the essential neurodegenerative applications published recently. In addition, because hydrogel-gated FETs are the crucial members of neuromorphic devices in terms of cutting-edge synaptic progress and performances, the review will also summarize the biodegradable and biocompatible polymers with which such devices can be implemented. It is expected that neuromorphic devices might provide potential solutions for the future generation of interactive sensation, memory, and computation to facilitate the development of multimodal, large-scale, ultralow-power intelligent systems. [ABSTRACT FROM AUTHOR]

The H-bridge MLI has cascaded to addicted cascaded the diode with switches of lower rated power, consumption of power reactive and active. A new system is being developed to increase effectiveness of MLI (multilevel inverter). within the electricity system, to inverter is critical for DC-AC voltage conversion. MLI focuses more on Industry Needs. MLI is typically used to provide high power at high voltage applications. In comparison to inverters flying capacitors and the diode-clamped, it has the fewest components and the voltage level it same number to achieve the voltage balancing capacitors or diodes any voltage clamping. This design incorporates a multilayer inverter with a cascaded H Bridge based on a Boost circuit (BCCHB). The job of the voltage to increase the boost circuit of the multilevel inverter. Boost circuits are essential in an application of wide range, including photovoltaic and the use of fuel cells. ML Inverter with Cascaded H Bridge is a Voltage Controlled Source Inverter with the advantages of being small in size and having an output waveform that is independent of load type. A cascaded H Bridge prototype model based on a boost circuit is validated, and the results simulation has been compared with the result. [ABSTRACT FROM AUTHOR]

With rapid development of high voltage direct current (HVDC) grids, hybrid circuit breakers (HCBs) have gained more attentions, due to their great ability for fault current interruption in HVDC grids. This paper proposes a novel low-cost HCB based on the coupled inductor, to be utilized in HVDC applications. To realize high current breaking capability with low cost, a coupled inductor in combination with the bridge-type circuit is utilized in the breaker branch. The bridge-type circuit is constructed by the series connection of a not pre-charged capacitor, thyristor, and diodes to provide bidirectional breaking ability. After an interruption, the capacitor in the breaker branch can be discharged quickly to guarantee that the proposed HCB is available for the next interruption. Detailed analysis and design equations are also provided to describe the operation of proposed HCB. The proposed HCB is simulated in Matlab/Simulink and simulations are used to analyze the performance of the HCB under the different conditions. Moreover, the proposed DCCB topology is validated using prototype experiments. [ABSTRACT FROM AUTHOR]

The series‐type direct current (DC) hybrid circuit breaker (S‐HCB) concept was previously reported to offer better performance than solid‐state circuit breakers (SSCB) and hybrid circuit breakers (HCB). S‐HCB offers low conduction power loss like an HCB and μs$\umu \text{s}$‐scale interruption time, which is even faster than an SSCB. It uses a pulse transformer to isolate the lower‐voltage high‐inductance power electronic circuit from the high‐voltage, low‐inductance main power loop. This paper provides analysis of the impact of the S‐HCB circuit components on the overall system performance and a scalable S‐HCB design guide for different DC system voltage and current ratings. In addition, system energy flow analysis is performed in the time domain to provide an understanding of how energy is delivered, dissipated, and released throughout the entire fault interruption process. The S‐HCB prototype was experimentally tested at 3 kV/30 A and 6 kV/150A with the results showing the interruption of the low fault current of 30 A and the high fault current of 150 A within 8 μs$\umu \text{s}$ and maintaining the fault current at a near zero value for 300μs$\nobreakspace \umu \text{s}$ to enable an arcless opening of a series mechanical switch. The key design challenges of S‐HCB at high voltage and high current ratings were discussed and possible solutions to mitigate those challenges were introduced. [ABSTRACT FROM AUTHOR]

Supercapacitor has been widely known as a representative electrochemical energy storage device with high power density and long lifespan. Recently, with the deeper understanding of its charge storage mechanism, unidirectional-charging supercapacitor, also called supercapacitor diode (CAPode), is successfully developed based on the ion-sieving effect of its working electrode towards electrolyte ions. Because CAPode integrates mobile ion and mobile electron in one hybrid circuit, it has a great potential in the emerging fields of ion/electron coupling logic operations, human–machine interface, neural network interaction, and in vivo diagnosis and treatment. Accordingly, we herein elucidate the working mechanism and design philosophy of CAPode, and summarize the electrode materials that are suitable for constructing CAPode. Meanwhile, some other supercapacitor-based devices beyond CAPode are also introduced, and their potential applications are instructively presented. Finally, we outline the challenges and chances of CAPode-related techniques. [ABSTRACT FROM AUTHOR]

This document is an editorial for a special issue of the journal Nanomaterials titled "Nano-Optics and Nano-Optoelectronics: Challenges and Future Trends." The editorial highlights the importance of nano-optics and nano-optoelectronics in investigating light at the nanometer scale and the interaction of nanometer-scale objects with light. The field has seen extensive research in the past decade, with promising applications in various areas such as optical communication, sensing, imaging, medicine, and green energy. The special issue includes sixteen papers that discuss recent advances in nanostructures and nanomaterials, as well as practical nano-optical and nano-optoelectronic technologies. The articles cover topics such as metastructures, metalenses, nanoparticles, layered 2D materials, and nano-semiconductors, and explore their applications in photodetectors, solar cells, modulators, light emitters, and nanofabrication. The issue also includes reviews on nano-related infrared absorption technology and neuromorphic photonics devices. Overall, the special issue provides valuable insights into the latest developments and future trends in nano-optics and nano-optoelectronics. [Extracted from the article]

The combination of permanent magnets and electrically excited windings creates an air gap magnetic field. The development of a hybrid magnetic circuit motor with an adjustable magnetic field is of great significance. This article introduces a hybrid magnetic circuit motor design that combines salient pole electromagnetic and permanent magnets. A tubular magnetic barrier has been designed to reduce inter-pole leakage and enhance the usage rate of permanent magnets in the hybrid magnetic circuit motor. The optimum eccentricity of the rotor has been accurately designed, resulting in an improved sinusoidal distribution of the air gap magnetic density waveform. An analysis of the static composite magnetic field under various excitation currents has been conducted, showcasing the capability of the hybrid magnetic circuit motor to stably adjust the air gap flux density level and output torque. A prototype has undergone comprehensive trial production and testing, conclusively confirming the machine's superior output performance. [ABSTRACT FROM AUTHOR]

Photonic circuits attract much attention as promising candidates to overcome the drawbacks of their electronic counterparts. By utilizing the broad bandwidth and low energy consumption of optical communication, hybrid circuits can provide a comprehensive platform for the era beyond Moore's law. In particular, parallel matrix operations, the heavy lifting behind neural networks, remain challenging for traditional electronics due to high heat dissipation. To enable these parallel computations optically, (de‐)multiplexing is crucial to address the different channels. Previously this has been accomplished with complex spectral or time encodings in wave division or time division methods. However, herein, a simple method to address parallel optical channels exclusively with 2‐bit signals is presented. By using PEDOT:PSS as electrochromic material for intensity modulation, light transmission or absorption is controlled by oxidation and reduction with an electrolyte. Y‐branch structures are used to design the multiplexing layout and to assign the 2‐bit states to the channels. This binary addressable optical multiplexer, therefore, combines optical communication with electronic signals into a hybrid circuit. [ABSTRACT FROM AUTHOR]

Hybrid circuit breakers are the most promising circuit breakers among DC circuit breakers. Conventional hybrid circuit breakers complete fault current isolation by converting current to IGBT when fault current occurs. However, in this case, the fault current continues to increase, so the IGBT must be large enough to withstand this current. In addition, in the case of a method of detecting and operating a fault, a delay time of up to hundreds of microseconds occurs, and in a hybrid circuit breaker, this delay time is a very large value. To solve this problem, this paper proposes a hybrid Z-source circuit breaker that operates without delay for low-impedance faults. The proposed breaker is designed to reduce stress on IGBTs and mechanical switches by generating a current zero crossing, as well as to enable the breaker to trip quickly in high-risk cases such as low-impedance fault circuits. Due to the limited environment of the laboratory, we performed 600 V fault isolation experiments. As a result of the experiment, it was confirmed that the proposed circuit breaker successfully isolated the fault within 1.6 ms. The current limiting feature of the Z-source appears to reduce stress on the IGBTs and MOVs used, and it allows for faster fault isolation. [ABSTRACT FROM AUTHOR]

As synthetic biology permeates society, the signal processing circuits in engineered living systems must be customized to meet practical demands. Towards this mission, novel regulatory mechanisms and genetic circuits with unprecedented complexity have been implemented over the past decade. These regulatory mechanisms, such as transcription and translation control, could be integrated into hybrid circuits termed "multi-level circuits". The multi-level circuit design will tremendously benefit the current genetic circuit design paradigm, from modifying basic circuit dynamics to facilitating real-world applications, unleashing our capabilities to customize cellular signal processing and address global challenges through synthetic biology. As synthetic biology permeates society, the signal processing circuits in engineered living systems must be customized to meet practical demands. In this review, the authors outline design strategies for the DNA, RNA, and protein-level circuits and the hybrid "multi-level" circuits. [ABSTRACT FROM AUTHOR]

With the fast growth of electronic technology today, the hybrid circuit of analog and digital circuits has become a trend in the growth of electronic technology. To address fault diagnosis in analog circuits, Haar wavelet is applied for fault feature extraction. The K-means clustering method and pseudoinverse algorithm were used to optimize the center value and weight value of the radial basis function neural network, respectively. The adaptive step size was improved in the wolf pack algorithm, the parameters of the radial basis function neural network were optimized based on the wolf pack algorithm, and a wolf pack algorithm optimized radial basis function neural network model was constructed. The test results show that this model converges after 40 times of training, with an error value of 10−3 and an average value of the mean squared error of 0.45. Comparing the fault diagnosis rates of the original model, genetic algorithm optimized radial basis function neural network model, and wolf colony algorithm optimized radial basis function neural network model, the last model has the best fault diagnosis rate, reaching 95.52%. The wolf colony algorithm is utilized to optimize the radial basis function neural network model to diagnose the faults in the standard filter circuit, and the fault diagnosis rate reaches 96.17%. The findings express that the radial basis function neural network model optimized by the wolf colony algorithm has a good diagnosis effect for different faults in the analog circuit. [ABSTRACT FROM AUTHOR]

Aimed at the optimization design of the parameters of the commutation circuit of a hybrid DC-current-limiting circuit breaker (HDCCLCB), a parameter selection model considering the short-time withstand of the thyristor and the volume of the commutation circuit is proposed by simplifying the object, and the commutation circuit parameters were preliminarily obtained. In order to verify the correctness of the method of selecting the commutation circuit parameters, the circuit simulation model of the HDCCLCB was built. The experimental platform was built, and the breaking experiment was completed under the fault condition with the current rising rate of 20 A/μs. The correctness of the simulation model and parameter design method was verified by comparing the circuit model simulation results with the experimental results. In order to further optimize the parameters of the commutation circuit, a mathematical model for optimization design was established. Taking the maximum critical breakdown voltage under unit capacitance energy as the objective function, the arcing time before commutating and the current-limiting inductance and capacitance are enumerated to obtain the optimized commutation circuit parameters. By comparing this result with the result of the preliminary design, the objective function is improved by 20.7%, laying a solid foundation for further research and the development of current-limiting circuit breakers for medium-voltage DC systems. [ABSTRACT FROM AUTHOR]

A multilayer, ultra‐wideband absorber is proposed in this paper, which consists of a hybrid circuit analog absorber and a metal resonant absorber. The circuit analog absorber is located at the upper part of the absorber to absorb low‐frequency electromagnetic waves, and the metal resonant absorber is located at the bottom of the absorber to absorb high‐frequency electromagnetic waves and provide a reflecting plate for the absorber. Through simulation, the absorption rate of the designed absorber can be greater than 90% in the range of 2.33–18.43 GHz, and an equivalent circuit is established for verification. In addition, the absorber has good angular stability and polarization insensitivity. The prototype of the absorber was manufactured and measured, and the test results are basically consistent with the analysis results. [ABSTRACT FROM AUTHOR]

There is a growing interest in the development of microelectronics that can perform reliably and robustly at temperatures above 300 °C. Such devices require stable thermal properties, low thermal drift, and thermal cycling resistance. Conventional hybrid circuit technology demonstrates high‐temperature packages, but the high costs and lead time are significant drawbacks. In contrast, additive manufacturing processes, including aerosol jet printing (AJP), offer cost and time benefits, as well as 3D structures and embedded features. However, the properties and reliability of additive packaging materials at extreme temperatures are not well known. Herein, the reliability at temperatures up to 750 °C in terms of electrical performance and mechanical strength of aerosol jet printed gold thick films onto ceramic substrates are assessed. Thermal coefficient of resistance of printed gold films is measured. The electrical resistance stability and leakage current of printed gold structures are also characterized during over 100 h of aging at temperatures up to 750 °C. Finally, the mechanical adhesion strength of the printed gold films is evaluated after aging for 100 h at temperatures up to 750 °C. The adhesion of the printed gold to the ceramic substrates remains high after aging, very stable resistances and minimal leakage currents have been observed. [ABSTRACT FROM AUTHOR]

The new emerging non-volatile memory (NVM) devices known as memristors could be the promising candidate for future digital architecture, owing to their nanoscale size and its ability to integrate with the existing CMOS technology. The device has involved in various applications from memory design to analog and digital circuit design. In this paper, a combination of memristor devices and CMOS transistors is working together to form a hybrid CMOS-memristor circuit for XAX- Module, a core element used as digital circuit for elliptic curve cryptography. The proposed design was implemented using Pt/TaOx/Ta memristor device and simulated in Cadence Virtuoso. The simulation results demonstrate the design functionality. The proposed module appears to be efficient in terms of layout area, delay and power consumption since the design utilizes the hybrid CMOS/memristor gates. [ABSTRACT FROM AUTHOR]

LED (light-emitting diode) drivers with the nonresonant DC-DC converters produce higher current and voltage ripple than the resonant converters. The resonant converter-based LED drivers provide low cost, high efficiency, enhanced soft switching capabilities, and simple construction. Therefore, this research work is motivated to propose a hybrid resonant converter to power the LED. The proposed modified hybrid resonant with valley-fill converter is built by removing the capacitors across the switches and the output diode is replaced with a valley-fill circuit in the conventional hybrid resonant converter. With the valley-fill circuit, the switches and the diode are subjected to reduced stress, reduced flicker, and improved efficiency. The modified Hybrid resonant converter with valley-fill circuit LED driver's performance parameters are compared with existing resonant converter topologies in terms of component count, current stress, voltage stress across the switch and output diode, LED voltage ripple, current ripple, and efficiency. A 10 W, 24 V laboratory prototype of modified Hybrid resonant converter with valleyfill circuit LED driver is developed, and the simulation results are validated. [ABSTRACT FROM AUTHOR]

Hybrid quantum systems have shown promise in image classification by combining the strengths of both classical and quantum algorithms. These systems leverage the parallel processing power of quantum computers to perform complex computations while utilizing classical algorithms to handle the vast amounts of data involved in imaging. The hybrid approach is intended to improve accuracy and speed compared to traditional classical methods. Further research and development in this area can revolutionize the way medical images are classified and help improve patient diagnosis and treatment. The use of Conventional Neural Networks (CNN) for the classification and diagnosis of medical images using big datasets requires, in most cases, the use of special high-performance computing machines, which are very expensive and hard to access by most researchers. A new form of Machine Learning (ML), Quantum machine learning (QML), is being introduced as an emerging strategy to overcome this problem. A hybrid quantum–classical CNN uses both quantum and classical convolution layers designed to use a parameterized quantum circuit. This means that the computing model utilizes a quantum circuits approach to construct QML algorithms, which are then used to transform the quantum state to extract image hidden features. This computational acceleration is expected to achieve better algorithm performance than classical CNNs. This study intends to evaluate the performance of a Hybrid Quantum CNN (HQCNN) against a conventional CNN. This is followed by some optimizer modifications for both proposed and classical CNN methods to investigate the possible further improvement of their performance. The optimizer modification is based on forcing the optimizer to be directly adaptive to model accuracy. The optimizer adaptiveness is based on the development of an optimizer with a loss base adaptive momentum. Several algorithms are developed to achieve the above-mentioned goals, including CNN, QCNN, CNN with the adaptive optimizer, and QCNN with the Adaptive optimizer. The four algorithms are tested against a Kaggle brain dataset containing over 7000 samples. The test results show the hybrid quantum circuit algorithm outperformed the conventional CNN algorithm. The performance of both algorithms was further improved by using a fully adaptive SGD optimizer. [ABSTRACT FROM AUTHOR]

The state of the energy-absorption branch MOV in the hybrid DC circuit breaker (DCCB) has a very important impact on the short fault breaking operation of the circuit breaker. Therefore, it is necessary to evaluate the state of the MOV, which is also called the "sleep component". Due to DCCB being placed indoors, the aging is mainly caused by short-circuit impulse current. Therefore, this paper mainly focuses on the study of the short-circuit impulse aging characteristics of the energy-absorption branch MOV. The dynamic simulation system of a hybrid DCCB was built to investigate the impulse of short-circuit current on the MOV of the energy-absorption branch during the circuit breaking process. Then, an accelerated impulse aging test platform was built and the accelerated impulse aging tests of the MOV were conducted. The aging characteristics of the MOV were analyzed in detail and detailed analysis was conducted of the macroscopic parameters and microstructure changes. The results indicate that the nonlinear coefficient α could be emphasized as a basis for judging the "sleeping" component states and aging degree of the hybrid DC circuit breaker, and can be expected to be applicable to MOV condition monitoring of BCCB in the future. [ABSTRACT FROM AUTHOR]

We present a novel closed-loop system designed to integrate biological and artificial neurons of the oscillatory type into a unified circuit. The system comprises an electronic circuit based on the FitzHugh-Nagumo model, which provides stimulation to living neurons in acute hippocampal mouse brain slices. The local field potentials generated by the living neurons trigger a transition in the FitzHugh–Nagumo circuit from an excitable state to an oscillatory mode, and in turn, the spikes produced by the electronic circuit synchronize with the living-neuron spikes. The key advantage of this hybrid electrobiological autogenerator lies in its capability to control biological neuron signals, which holds significant promise for diverse neuromorphic applications. [ABSTRACT FROM AUTHOR]

This paper presents a 250 kHz bidirectional battery charger circuit using a GaN HEMT. The charger is subjected to a high-/low-side constant voltage at 200 V/20 V. The charger circuit is a hybrid of the LLC and flyback circuit topologies. Both the power output analysis and efficiency control of this circuit are simplified when the magnetization current is minimized using the low-resistance GaN HEMT. The switching frequency is controlled to match the series resonance in a way that is analogous to conventional LLC circuit controls, while the duty ratio that determines the power output and the dead time, which determines the zero voltage switching, is controlled in an analogous manner to the flyback circuit control. The charging and discharging modes were altered by applying a double-throw relay that changes the transformer turn ratio, which is different from conventional LLC designs using the switching frequency adjustment. A nominal turn ratio with Np = 35 and Ns = 3.5 for a 200 V/20 V converter can only produce an internal series resonance with no current flowing in any charging direction. The proposed circuit using a transformer with multiple windings (Np = 35, Ns,F = 4, and Ns,R = 3) was fabricated to deliver 125 W output power from the power grid battery to the vehicle battery in the forward (charging) mode and 90 W in the reverse (discharging) mode. The conversion efficiency was calculated to be as high as 97% in the forward mode and 95% in the reverse mode. The high conversion efficiency is due to the characteristics of the GaN HEMT, including low resistive and switching losses. The equations derived in this paper associate these losses with the series resonant frequency and power conversion rate, which highlight the advantages of using a GaN HEMT in this CLLC design. [ABSTRACT FROM AUTHOR]

Summary: This work proposes a link training based half‐rate dynamic current‐steering echo‐cancellation hybrid circuit topology for full‐duplex signaling that performs echo cancellation by deploying a bit error detection unit and backchannel adaptation. In addition, this work proposes a power‐efficient half‐rate dynamic current‐steering logic hybrid circuit for full‐duplex signaling over on‐chip interconnects for simultaneous transmission and reception. The half‐rate dynamic current‐steering hybrid circuit topology has low static power consumption compared with traditional current‐mode circuit topology implementations, thanks to the discrete nature of the current‐steering hybrid topology. The proposed scheme is implemented in 1.2 V, 65‐nm complementary metal‐oxide semiconductor (CMOS). The performance results show that the link training scheme sets the control bits for both the transmitter driver and hybrid circuit topology when the backchannel adaptation loop gets locked for 1‐ and 3‐mm interconnects for process, voltage, and temperature (PVT) variations. The proposed hybrid circuit topology is able to receive the required far‐end transmitted data with the link training scheme and has the differential recovered received signal voltage swing of 1.2 V for both 1‐ and 3‐mm interconnect at the 10‐Gb/s data rate. The total power consumption of the hybrid is 3 and 3.5 mW for 1‐ and 3‐mm interconnect with an energy efficiency of 0.6 and 0.7 pJ/bit, respectively, at 10‐Gb/s full‐duplex operation. [ABSTRACT FROM AUTHOR]

Multi‐terminal flexible DC power grid plays an important role in large‐scale new energy integration, which usually requires the installation of multi‐terminal DC circuit breaker (MTCB) at the intersection of multiple DC lines. At present, the research on multi‐terminal DC circuit breaker is mostly limited to theoretical simulation calculation, and there are few experimental studies and engineering applications. In this paper, a four‐terminal DC circuit breaker based on commutating path multiplexing is proposed, which combines with the compact natural commutation scheme of hybrid gap, greatly reducing the cost and volume of the circuit breaker. The commutation characteristics of the four‐terminal hybrid DC circuit breaker equivalent prototype at 10‐kV voltage level were tested. On this basis, the equivalent prototype of the circuit breaker test results shows that under 10‐kV voltage level, the four‐terminal circuit breaker topology can achieve breaking of 11 kA in 2.8 ms by the natural commutation method. [ABSTRACT FROM AUTHOR]

Biohybrid circuits of interacting living and model neurons are an advantageous means to study neural dynamics and to assess the role of specific neuron and network properties in the nervous system. Hybrid networks are also a necessary step to build effective artificial intelligence and brain hybridization. In this work, we deal with the automatized online and offline adaptation, exploration and parameter mapping to achieve a target dynamics in hybrid circuits and, in particular, those that yield dynamical invariants between living and model neurons. We address dynamical invariants that form robust cycle-by-cycle relationships between the intervals that build neural sequences from such interaction. Our methodology first attains automated adaptation of model neurons to work in the same amplitude regime and time scale of living neurons. Then, we address the automatized exploration and mapping of the synapse parameter space that lead to a specific dynamical invariant target. Our approach uses multiple configurations and parallel computing from electrophysiological recordings of living neurons to build full mappings, and genetic algorithms to achieve an instance of the target dynamics for the hybrid circuit in a short time. We illustrate and validate such strategy in the context of the study of functional sequences in neural rhythms, which can be easily generalized for any variety of hybrid circuit configuration. This approach facilitates both the building of hybrid circuits and the accomplishment of their scientific goal. • We ease the construction of biohybrid circuits between living and model neurons. • We explore and map the parameter space that lead to a specific target dynamics. • A genetic algorithm readily yields instances of the target biohybrid dynamics. • We illustrate this approach in the context of biohybrid dynamical invariants. • We validate the strategy for coordination of functional sequences in neural rhythms. [ABSTRACT FROM AUTHOR]

Fluorescent plastically bendable crystals are a promising alternative to silicon‐based materials for fabricating photonic integrated circuits, owing to their optical attributes and mechanical compliance. Mechanically bendable plastic organic crystals are rare. Their formation requires anisotropic intermolecular interactions and slip planes in the crystal lattice. This work presents three fluorescent plastically bendable crystalline materials namely, 2‐((E)‐(6‐methylpyridin‐2‐ylimino)methyl)‐4‐chlorophenol (SB1), 2‐((E)‐(6‐methylpyridin‐2‐ylimino)methyl)‐4‐bromophenol (SB2), and 2‐((E)‐(6‐Bromopyridin‐2‐ylimino)methyl)‐4‐bromophenol (SB3) molecules. The crystal plasticity in response to mechanical stress facilitates the fabrication of various monolithic and hybrid (with a tip‐to‐tip coupling) photonic circuits using mechanical micromanipulation with an atomic force microscope cantilever tip. These plastically bendable crystals act as active (self‐guiding of fluorescence) and passive waveguides both in straight and extremely bent (U‐, J‐, and O‐shaped) geometries. These microcircuits use active and passive waveguiding principles and reabsorbance and energy‐transfer mechanisms for their operation, allowing input‐selective and direction‐specific signal transduction. [ABSTRACT FROM AUTHOR]

This paper presents simulation and measurement results of a 2–4 GHz octave bandwidth interference suppression circuit. The circuit accomplishes the function of a tunable frequency notch through an interferometer architecture. The relative delay in the interferometer paths is varied with GaN monolithic microwave integrated circuit tunable delay lines. The delay is adjusted by varying the drain voltage of cold‐FET connected high electron mobility transistors acting as varactors. Two types of periodically‐loaded delay lines are compared: a uniform and a tapered design. A simple theoretical study, relating the delays and amplitudes in the interferometer circuit branches, is developed to inform the design. Two interference suppression hybrid circuits are implemented, and measurements demonstrate a 25–40 dB notch across the 2.24–4 GHz range for the uniform delay line, and 2.32–4.13 GHz for the tapered design. The return loss for both designs remains below 10 dB. Measurements with two tones spaced 0.5 and 1 GHz for varying tone power are performed to quantify suppression. The circuit can handle an input power of 37 dBm and maintains performance with two simultaneous 25 dBm tones spaced 0.5 GHz apart. Linearity is characterised with 10 MHz two‐tone measurements, and the circuit demonstrates a 3rd‐order intercept input power larger than 30 dBm for control biases above −12 V. [ABSTRACT FROM AUTHOR]

In this paper, a controllable hybrid plasmonic integrated circuit (CHPIC) composed of hybrid plasmonic waveguide (HPW)-based rhombic nano-antenna, polarization beam splitter, coupler, filter, and sensor has been designed and investigated for the first time. In order to control the power into a corresponding input port, a graphene-based 1 × 3 power splitter with switchable output has been exploited. The functionality of each device has been studied comprehensively based on the finite element method and the advantages over state-of-the-art have been compared. Moreover, the effect of connection of CHPIC to the photonic and plasmonic waveguides has been studied to exhibit the capability of variety excitation methods of the CHPIC. Furthermore, the performance of the proposed CHPIC connected to inter/intra wireless transmission links has been investigated. The wireless transmission link consists of two HPW-based nano-antennas as transmitter and receiver with the maximum gain and directivity of 10 dB and 10.2 dBi, respectively, at 193.5 THz. The suggested CHPIC can be used for applications such as optical wireless communication and inter/intra-chip optical interconnects. [ABSTRACT FROM AUTHOR]

In this study, a new 36‐pulse rectifier with a hybrid DC‐reinjection circuit is proposed. It multiplies the AC‐side input voltage steps from 12 to 36 using a hybrid auxiliary circuit for voltage and current modulation. Both the AC and DC side harmonics of the rectifier system are efficiently suppressed when combined with filter capacitors at DC side. Only 2 more diodes and an IGBT are used in the proposed approach for constituting the injection circuit. The cascaded structure of rectifier bridges allows for significant voltage gain, making it appropriate for high power output rectification applications. The proposed 12‐pulse rectifier's phase shifting structure and 36‐pulse rectifier's operational theory are introduced. The injection transformer's turn ratio and the IGBT's conduction angle are both designed to have the lowest possible harmonic distortion of the voltage at AC side. Analyses are done on the rectifier's impedance matching feature and energy loss of IGBT. The operating performance of the rectifier is assessed when the active switch fails. With the help of a 1.8 kW prototype and a HIL system based on Starsim, the theoretical portion is confirmed. The results of the simulation and experiments support the effectiveness of the hybrid voltage harmonic injection method studied. [ABSTRACT FROM AUTHOR]

In recent years, low-voltage direct current (LVDC) microgrids are becoming more attractive because they represent a solution to integrate renewable sources, storage, and electronic loads bringing some advantages in comparison with traditional AC grids. However, the protection of such a network involves many challenges, especially in the case of LVDC microgrids with more than one feeder and multiple energy sources. Indeed, the traditional protection breakers used for an AC grid cannot isolate the faults and protect the components of a DC grid, while the use of solid-state circuit breakers increases energy losses. This paper deals with the analysis and design of the protection schemes for LVDC microgrids through the combination of mechanical circuit breakers and hybrid circuit breakers. This solution has the advantage of energy loss reduction but introduces further issues due to the slow transition times of the mechanical circuit breakers. Thus, a completely decentralized control system capable of overcoming the fast fault-clearing time, cost-effectiveness, and selectivity issues is designed to protect from pole-to-pole faults. The proposed control strategy is compared with a centralized protection scheme available in the literature through numerical simulation. The two algorithms show similar performances, with a mean voltage dip duration of less than 30 ms and a maximum voltage dip duration of about 100 ms in the most severe fault condition, but the proposed solution is more reliable and flexible since it does not depend on the communication system. [ABSTRACT FROM AUTHOR]

Quantum coherence as an asymmetry relative to a translation group generated by a Hermitian operator, is a necessary resource for the quantum parameter estimation. On the other hand, the sensitivity of the parameter estimation is known to be related to the imaginary part of the weak value of the Hermitian operator generating the unitary imprinting of the parameter being estimated. This naturally suggests a question if one can use the imaginary part of the weak value to characterize the coherence as asymmetry. In this work, we show that the average absolute imaginary part of the weak value of the generator of the translation group, maximized over all possible projective measurement bases, can be used to quantify the coherence as asymmetry relative to the translation group, satisfying certain desirable requirements. We argue that the quantifier of coherence so defined, called translationally-covariant (TC) w-coherence, can be obtained experimentally using a hybrid quantum–classical circuit via the estimation of weak value combined with a classical optimization procedure. We obtain upper bounds of the TC w-coherence in terms of the quantum standard deviation, quantum Fisher information, and the imaginary part of the Kirkwood–Dirac quasiprobability. We further obtain a lower bound and derive a relation between the TC w-coherences relative to two generators of translation group taking a form analogous to the Kennard–Weyl–Robertson uncertainty relation. [ABSTRACT FROM AUTHOR]

Flexible direct current (DC) grids face a serious challenge in terms of rapidly isolating DC faults. A DC circuit breaker is an effective solution for DC fault isolation. To improve the fault-isolation and reclosing capability of flexible DC systems, a new high voltage direct current (HVDC) circuit breaker topology with adaptive reclosing capability is proposed in this paper. The topology of the circuit breaker is a T-shaped structure, which has the ability to break the current in both directions and effectively reduce the cost of components. Meanwhile, after the fault is cleared, the circuit breaker is controlled to inject a voltage signal into the line. Based on this, to prevent the circuit breaker reclosing in the event of a permanent fault from having an impact on the system, a method for fault identification based on Euclidean distance that uses the voltage signal to identify the fault properties is proposed. Finally, the performance of the circuit breaker is simulated and verified by PSCAD/EMTDC simulation software, and compared with the typical existing circuit breakers to verify the effectiveness of the circuit breaker and reclosing scheme. [ABSTRACT FROM AUTHOR]

We investigate multiple photon-assisted Landau–Zener (LZ) transitions in a hybrid circuit quantum electrodynamics device in which each of two interacting transmission-line resonators is coupled to a qubit, and the qubits are driven by periodic driving fields and also coupled to a common phonon mode. The quantum state of the entire composite system is modeled using the multi-D2Ansatz in combination with the time-dependent Dirac–Frenkel variational principle. Applying a sinusoidal driving field to one of the qubits, this device is an ideal platform to study the photon-assisted LZ transitions by comparing the dynamics of the two qubits. A series of interfering photon-assisted LZ transitions takes place if the photon frequency is much smaller than the driving amplitude. Once the two energy scales are comparable, independent LZ transitions arise and a transition pathway is revealed using an energy diagram. It is found that both adiabatic and nonadiabatic transitions are involved in the dynamics. Used to model environmental effects on the LZ transitions, the common phonon mode coupled to the qubits allows for more available states to facilitate the LZ transitions. An analytical formula is obtained to estimate the short time phonon population and produces results in reasonable agreement with numerical calculations. Equipped with the knowledge of the photon-assisted LZ transitions in the system, we can precisely manipulate the qubit state and successfully generate the qubit dynamics with a square-wave pattern by applying driving fields to both qubits, opening up new venues to manipulate the states of qubits and photons in quantum information devices and quantum computers. [ABSTRACT FROM AUTHOR]

Reconfigurable transistors are an emerging device technology adding new functionalities while lowering the circuit architecture complexity. However, most investigations focus on digital applications. Here, we demonstrate a single vertical nanowire ferroelectric tunnel field-effect transistor (ferro-TFET) that can modulate an input signal with diverse modes including signal transmission, phase shift, frequency doubling, and mixing with significant suppression of undesired harmonics for reconfigurable analogue applications. We realize this by a heterostructure design in which a gate/source overlapped channel enables nearly perfect parabolic transfer characteristics with robust negative transconductance. By using a ferroelectric gate oxide, our ferro-TFET is non-volatilely reconfigurable, enabling various modes of signal modulation. The ferro-TFET shows merits of reconfigurability, reduced footprint, and low supply voltage for signal modulation. This work provides the possibility for monolithic integration of both steep-slope TFETs and reconfigurable ferro-TFETs towards high-density, energy-efficient, and multifunctional digital/analogue hybrid circuits. Increasing functional density is desirable for future scaling of electronics. Here, the authors use a nanowire ferroelectric tunnel field-effect transistor to achieve reconfigurable signal modulations for low-power and high-density analogue circuits. [ABSTRACT FROM AUTHOR]

Nowadays, traditional DC circuit breakers (DCCBs) are always expensive and lack current-limiting capabilities. Hence, this paper proposes a current limiting and low-cost hybrid DC circuit breaker (HCB). When a fault occurs, the paralleled inductors in the proposed HCB are converted to a series connection due to the cutoff of the converter module, effectively limiting the increase of fault current. Then the cascaded IGBTs undertake the transient interruption voltage. Energy dissipation circuits (EDCs) reduce the fault isolation time (FIT) by bypassing the current-limiting inductor during energy dissipation based on the metal oxide varistors (MOVs). Therefore, the proposed HCB can limit the rate of the fault current increase, reducing the FIT and cost. Finally, the feasibility of the proposed HCB is verified by a single-ended equivalent system and DC grid test systems built in PSCAD/EMTDC. In addition, the proposed HCB FIT is 33.7% quicker, its energy consumption is 87%, and its cost is lower than that of the traditional ABB HCB. [ABSTRACT FROM AUTHOR]

Sense amplifier is a key element of memory and a CMOS-based spin hybrid circuit. Magnetic tunnel junction (MTJ) is a key spintronic device used in spin-based memory and hybrid circuits. This paper presents a design of a voltage-controlled magnetic anisotropy MTJ-based sense amplifier (VCMA-SA) that offers better reliability, power efficiency and high-speed performance. MTJ switching between different resistive states in this paper takes place through the faster and energy-efficient voltage-controlled magnetic anisotropy (VCMA) scheme rather than the traditional spin-transfer torque (STT)-based magnetization switching. This paper demonstrates that SA based on VCMA-MTJ switching is faster, reliable and more energy-efficient compared with iPMA-based STT switching. [ABSTRACT FROM AUTHOR]

The high‐voltage direct current (HVDC) power transmission short‐circuit fault protection is a big challenge, and it is the main obstacle to promote the HVDC multi‐terminal networks. A natural commutation current topology (NCCT) of hybrid HVDC circuit breaker (DCCB) integrated with limiting fault current is proposed in this paper, which shares several obvious merits, such as lower peak fault current, shorter fault isolation time and low turn‐off loss. The main contributions in this paper are made as follows. (1). A second‐order RLC circuit in novel NCCT circuit breaker is utilized as the current limiting circuit to dramatically reduce the fault current rising slope and its peak value. (2) A asynchronous NCCT circuit breaker has been investigated to broaden the proposed NCCT circuit breaker's optimal working area. (3) By taking China Zhangbei 500 kV four‐terminal DC grid as an example, an optimization design technique of the asynchronous NCCT‐DCCB is developed to demonstrate the process of the theoretical analysis and parameter design. The correctness of the proposed NCCT‐DCCB and the feasibility of the optimization design technique are confirmed by EMT simulation on PSCAD/EMTDC and hardware‐in‐loop experiment on PLECS‐RtBox. [ABSTRACT FROM AUTHOR]

In this paper, Astable Multivibrator (AMV) circuits are designed and simulated using pure Carbon Nanotube Field Effect Transistors (CNTFETs) as well as hybrid CNT-CMOS technology, and simulation results are compared with conventional CMOS technology by varying the value of resistor- 'R', capacitor- 'C', supply voltage- 'Vdd' and temperature- 'T'. It has been found that novel CNT-based AMV outperforms conventional CMOS-based AMV and the performance of hybrid circuits exists between PURE-CNT-AMV and CMOS-AMV. The rise time and fall time of PURE-CNT-AMV are improved by 97.2% and 96.5% respectively as compared to CMOS-AMV, which increases the speed of operation of the circuit. A significant improvement of approximately 3515% is observed in the slew rate of PURE-CNT-AMV and also, the amplitude of the output square wave is increased by 0.91%. In addition, the maximum usable frequency for PURE-CNT-AMV is increased by 656.96% as compared to CMOS-AMV. Furthermore, the behavior of CNT-based AMV circuits is also analyzed by varying the number of CNTs- 'N', inter CNT pitch- 'S' and CNT diameter- 'DCNT' at R = 50kΩ, C = 1 pf and Vdd = 0.9 V. However, the power dissipation of PURE-CNT-AMV is 3.7% higher than CMOS-AMV which can be improved by adjusting the value of 'R–C' delay network, operating the circuit at lower supply voltage, and choosing the optimum value of N, S and DCNT. [ABSTRACT FROM AUTHOR]

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Hybrid DC circuit breakers (HDCCBs) have excellent performance in terms of breaking speed and low losses and have become the mainstream technology for dc fault isolation in dc grids. However, because of the breaking limitation of the solid-state branch in HdcCBs, the existing HdcCBs are still weak in breaking high current. Although the breaking ability can be improved by series and parallel devices, the cost will increase rapidly, and it is very difficult to share current by paralleling a single type of device. This article proposes a novel HdcCB topology that combines two types of power electronic devices in solid-state branches to meet the requirement of a large breaking capacity in dc grids. The structure and breaking principles of this novel topology, which aims to break high current, are introduced. The design methods of the key parameters are presented. Then, the current breaking ability of the novel topology is verified by developing a prototype completing a 10 kV/60 kA breaking test in 3 ms. Finally, this novel topology is compared with other dc circuit breakers at the same breaking level, which shows that this novel topology has obvious advantages in cost and volume with fewer devices. [ABSTRACT FROM AUTHOR]